Volantis Raises $88M for Photonic AI Inference

The race to serve larger AI models is turning into a question about how far a memory signal can travel before physics and economics stop cooperating. Volantis Semiconductor has raised an $88M Series A to build A-1, an inference system that uses photonics to connect compute with a much larger pool of memory.

Lachy Groom and Abstract Ventures co-led the October 1, 2026 round. John Doerr, VXI Capital, Triatomic and Susa Ventures participated, while Dwarkesh Patel, Naveen Rao and Sholto Douglas joined as angel investors. Volantis says the financing brings its total funding to $97M and will support A-1 development, commercialization and engineering expansion.

What Volantis Is Building

Large AI models need memory capacity to hold parameters and context, plus enough bandwidth to keep the compute engine supplied with data. Conventional systems force architectural compromises. On-chip SRAM offers high bandwidth but limited capacity, while systems built around high-bandwidth memory provide more capacity but remain constrained by the short electrical paths that connect memory to compute.

Volantis's A-1 product is designed to move that connection into an optical fabric. The company uses integrated micro-VCSEL arrays and optical waveguides to link compute chips with a unified pool of off-chip memory. Volantis says optical paths can extend more than 200 millimeters across an interposer, compared with roughly 2 to 5 millimeters for electrical wires, allowing more memory chiplets to be connected at uniform latency.

The company is targeting a 15U system with 10 TB of memory, 240 TB/s of memory bandwidth and a 20 kW power envelope. Its October 1 announcement says A-1 is being designed to run models exceeding 20T parameters at up to 10,000 tokens per second per user. These figures are company design targets, not independent production benchmarks.

Why Photonics Changes the Memory Equation

Photonics is already used to move data through networks and between chips, but connecting compute directly to memory creates a different cost and energy problem. The link distance is shorter, the bandwidth density is much higher and the system must survive the thermal and manufacturing conditions inside advanced packages.

Volantis's technology replaces external lasers and conventional optical fiber in the memory path with custom micro-VCSELs and integrated waveguides. The company reports link energy below 1 picojoule per bit and measured bit-error rates below 1e-12 at wafer scale. It also says the design can connect more than 220 memory chiplets in a single pool. Reuters framed the supply-chain logic around VCSELs already produced at consumer scale for smartphone sensing.

That component familiarity matters, but it does not make the system simple. Volantis still has to integrate optics, packaging, memory, compute, power and cooling into a product that customers can deploy and operate. The financing gives the company room to move from measured links and system targets toward a complete inference engine.

The Team Behind A-1

Tapa Ghosh is Volantis's CEO and co-founder. Roy Meade is co-founder and CTO, after previously leading Micron's high-bandwidth memory program and serving as a vice president at Ayar Labs. The broader Volantis team includes engineers with experience at NVIDIA, AMD, Broadcom, Marvell, Ayar Labs and Micron.

The company credits team members with work on the first CoWoS product, early silicon-photonics co-packaged optics systems and high-volume tunable VCSELs. Those backgrounds line up with the central risk in A-1: the architecture must become manufacturable hardware, not remain an elegant performance model.

Volantis was founded in 2022 and emerged publicly in 2025 with a $9M seed round. The new Series A is a substantial increase in capital for a company whose first integrated customer systems are still planned for 2027. No valuation, revenue, customer count or signed deployment volume was disclosed.

What the $88M Changes

The most immediate change is organizational. Volantis currently lists 30 open roles across photonics, advanced packaging, architecture, ASIC design, system engineering, PHY/SERDES and validation. The roles span the San Francisco Bay Area, Austin, Boston and some remote arrangements, reflecting the breadth of engineering required to turn the optical fabric into a deployable system.

The company is also choosing to license proven compute-engine intellectual property rather than make every layer of the machine novel. That concentrates more technical risk in the photonic interconnect and system integration. It is a pragmatic choice for a startup trying to prove a new memory architecture without also rebuilding the entire accelerator stack.

Volantis says A-1 can deliver 15 times more tokens per dollar than NVIDIA Rubin and 6 times more tokens per watt for low-latency mixture-of-experts models above 1T parameters. Those comparisons should be treated as company projections until independent workloads, system configurations and commercial availability make them reproducible.

What This Signals for AI Infrastructure

The AI infrastructure market has spent years treating more compute as the primary route to more capable systems. Volantis is making a different capital allocation argument: an accelerator's value increasingly depends on how quickly and economically memory can feed it, especially as models and context windows grow.

That shift puts memory architecture, optical components and advanced packaging closer to the center of AI system economics. If Volantis can deliver A-1 on its stated 2027 timeline, buyers would gain another way to evaluate inference infrastructure beyond accelerator count alone. Model size, interactive latency, power, memory capacity and cost per token would move together inside the purchasing decision.

The $88M Series A finances the difficult part of that argument. Volantis has credible people, a defined architecture, measured link-level evidence and a supply-chain thesis built around familiar components. The work now moves into integrated hardware, customer validation and repeatable manufacturing, where the memory wall becomes less of a diagram and more of a delivery schedule.